Samsung's LPDDR5X-PIM embeds processing in memory to accelerate AI workloads
Samsung detailed its LPDDR5X-PIM at Hot Chips 2026, adding in-memory logic to low-power DRAM. The company reports a 3.01x speedup in AI inference and 8x bandwidth compared to standard LPDDR5X. This approach aims to reduce reliance on expensive HBM for AI workloads.
Samsung's PIM concept dates back to 2021, when it first demonstrated the approach through HBM stacks used in AMD accelerators. The LPDDR5X version improves on that earlier design by giving each memory bank its own processing unit, rather than requiring banks to be cut to accommodate logic. The technology operates in two modes—standard single-bank DRAM or multi-bank PIM—with traditional controllers able to switch between them.
The company's Address Align Mode maps DRAM addresses directly to MAC instructions, sidestepping conventional reordering challenges. Samsung is already planning LPDDR6X-PIM and expects a JEDEC specification this year. The push stems from HBM's rising costs and wafer demands, which Micron highlighted at the same conference.
This technology could meaningfully lower AI inference costs by reducing dependence on expensive HBM memory, potentially making AI deployment more accessible to smaller organizations and edge applications. Consumers may eventually see faster, more power-efficient AI features in mobile devices if LPDDR5X-PIM reaches production. However, widespread adoption depends on ecosystem support, manufacturing yields, and whether the performance gains justify the added complexity—factors that could delay real-world impact despite promising benchmarks.