MobbleOpen in Mobble ⇢
Technology · Semiconductors · published 2026-10-05 · via Semiengineering.com

Researchers Achieve Breakthrough in 2D Monolayer Transistor Performance for Next-Generation Chip Technology

Image via Semiengineering.com
Image via Semiengineering.com

An international research collaboration has demonstrated high-performance p-type transistors using oxygen-doped tungsten diselenide monolayers with dramatically reduced contact resistance. The breakthrough addresses a critical limitation in scaling 2D semiconductors to sub-1-nanometer technology nodes required for advanced CMOS circuits. The technique enables ballistic charge transport and higher current density, bringing 2D materials closer to practical implementation in future chip designs.

Expanded Detail

The research addresses a fundamental challenge in extending 2D semiconductor technology to the next generation of chip manufacturing. Metal-induced gap states and insufficient doping have historically created barriers at the interface between metal contacts and 2D materials, restricting the flow of electrical current and limiting performance. By employing oxygen doping on tungsten diselenide, the international team significantly reduced these contact resistance issues, enabling more efficient charge transport through the transistor channel.

This advancement matters because advancing beyond current silicon-based processes requires new materials capable of operating at sub-1-nanometer scales. The demonstrated ballistic transport—where charge carriers move without scattering—represents a critical step toward making 2D materials practical for large-scale CMOS circuit integration, potentially unlocking improved current density and energy efficiency in future processors.

Context

If successfully scaled to manufacturing, this breakthrough could influence the trajectory of semiconductor device development for computing, mobile electronics, and data centers. The achievement may reduce performance bottlenecks that currently limit 2D material applications, potentially expanding design options for chipmakers seeking alternatives to traditional approaches. Broader adoption could affect how efficiently future processors operate and consume power, though significant engineering and manufacturing hurdles remain before commercialization.

Expanded detail and Context are AI-generated analysis; the linked article remains the authoritative source.
Read the full article at Semiengineering.com →
Related stories
Applied Materials and Intel Expand Research Partnership for Next-Generation AI Chip Manufacturing · Semiconductors
This summary is Al-enhanced to contain extended analysis and broader social context. The original is {NAME); the linked article is the authoritative source. Original headline: “Reducing Contact Resistance Pushes 2D Transistors Toward Advanced CMOS (HUST, PolyU, UCSB, NUS).” Browse more stories.