SK hynix develops tiny H-TPU cores to offload SSD controller workloads
SK hynix has detailed a new in-house core called the H-TPU that is designed to handle repetitive I/O tasks in SSD controllers. The tiny cores use a four-stage in-order pipeline and reportedly consume about 2.5% of the power and 4% of the area of a general-purpose CPU core. SK hynix plans to use H-TPUs across its NAND products, including next-generation enterprise SSD controllers.
SK hynix's H-TPU is a compact, programmable core intended to complement, not replace, an SSD controller's Arm CPU. It targets repetitive storage duties such as command processing, metadata management, and buffer control, while the main CPU retains error recovery, exceptions, and policy management. The design uses sequential execution and a four-stage pipeline, and SK hynix provides a compiler and development tools.
The company says each H-TPU needs roughly 2.5% of a general-purpose CPU core's power and 4% of its area. Dozens of small clusters, containing more than 100 H-TPUs total, would divide specialized functions. SK hynix plans to deploy them across NAND products, including future enterprise SSD controllers, as PCIe bandwidth growth strains controller CPUs.
Faster, more power-efficient SSD controllers could affect data centers, cloud providers, enterprises, and eventually consumers by enabling higher storage throughput with less energy and board space. This may lower operating costs and cooling needs for large storage fleets, while improving responsiveness of data-heavy services. It could also sharpen competition among memory and controller suppliers, influencing the price and availability of advanced SSDs. Infrastructure teams may need to rethink how they balance CPU, storage, and power budgets.