ChipAgents and NVIDIA Release Benchmark for AI-Driven Chip Design
ChipAgents and NVIDIA introduced Build-A-Chip-Bench, a benchmark for testing whether AI agents can complete an end-to-end digital chip design task. The benchmark covers architecture, RTL, verification, synthesis, floor planning, placement, routing, timing, power, and physical verification. Its aim is to measure progress toward autonomous semiconductor engineering.
ChipAgents and NVIDIA created Build-A-Chip-Bench to evaluate AI agents across a full digital chip-design pipeline, from specification to verified GDS. It spans architecture, microarchitecture, RTL, functional verification, synthesis, floor planning, placement, clock-tree synthesis, routing, timing and power signoff, and physical verification. Earlier hardware-AI tests often ended before physical implementation.
In first evaluations, agents passed functional verification for about 40% of tasks on average, but only roughly 10% satisfied required PPA targets. The benchmark was developed by Surya Gunukula, Jerry Yicheng Wang, and Kevin Zhang, with NVIDIA technical expertise. Its results indicate that correct RTL alone does not ensure a design can meet physical constraints.
If AI agents become more capable at end-to-end chip design, semiconductor firms, engineers, and tool vendors could see faster iteration and lower design costs, potentially shortening time to market for electronics. However, the benchmark’s early results suggest autonomous design remains limited, so near-term impact may center on assisting engineers rather than replacing them. Broader society could benefit from more accessible, efficient chips, while workforce and verification practices may need to adapt as reliance on AI-assisted workflows grows.