CXMT begins volume production of fifth-gen DRAM with 24Gb LPDDR5X chips
CXMT has started mass production using its fifth-generation DRAM process, which reduces the active-area half-pitch to 11.95nm via quadruple-patterning lithography. The first products are 24Gb LPDDR5X devices offering 50% more capacity than previous chips, and they are already being used in Chinese flagship smartphones. The process also employs high-K metal gate technology and capacitors with a 45:1 aspect ratio, though this is lower than the 100:1 ratio expected for future sub-10nm nodes.
CXMT's G5 process marks a notable technical advance for China's domestic memory sector, shrinking the active-area half-pitch to 11.95nm through quadruple-patterning lithography. The company reports a 50% increase in gross dies per wafer over its G4 generation, though specific yield data was not disclosed, leaving actual production efficiency unclear.
The first commercial products are 24Gb LPDDR5X chips offered in two package configurations for mobile devices. The process incorporates high-K metal gate technology and storage capacitors with a 45:1 depth-to-width aspect ratio. Industry projections from SK hynix suggest capacitor ratios will need to exceed 100:1 as critical dimensions fall below 10nm, indicating CXMT may face significant scaling challenges in future generations.
CXMT's advancement could introduce a new competitive dynamic in the global DRAM market, potentially affecting pricing and supply stability for device manufacturers worldwide. Consumers may benefit from more affordable high-capacity memory in mobile products, particularly as Chinese smartphone makers gain access to domestically produced chips. However, the technology gap with established leaders remains considerable, and without disclosed yields, the true cost competitiveness is uncertain. The development could also influence how other nations approach semiconductor supply chain resilience and domestic production strategies.